Static induction and heterojunction source integrated high-voltage FET, has structure provided with vertical channel, where low-resistance thin layer of gallium arsenide and germanium match lattices of gallium arsenide and silicon
2023-01-25
专利权人VEGA DESIGN CENT BIOMICRELECTRONIC TECHN (VEGA-Non-standard)
申请日期2023-01-25
专利号RU2023101620-A
成果简介NOVELTY - The FET has a structure provided with a vertical channel. A high-resistance region of conductivity type is formed above a low-resistance region of first conductivity type of silicon, which is a drain. A gate region of second conductivity type is formed in the form of a cellular structure. An isotypic heterojunction is made of aluminum and formed in a source region. A low-resistance thin layer of gallium arsenide and a thin layer of germanium match lattices of gallium arsenide and silicon. USE - Static induction and a heterojunction source integrated high-voltage FET.
IPC 分类号H01L-029/772
国家俄罗斯
专业领域材料科学
语种英语
成果类型专利
文献类型科技成果
条目标识符http://119.78.100.226:8889/handle/3KE4DYBR/22339
专题中国科学院新疆生态与地理研究所
作者单位
VEGA DESIGN CENT BIOMICRELECTRONIC TECHN (VEGA-Non-standard)
推荐引用方式
GB/T 7714
MAKSIMENKO YU N,GRABEZHOVA V K,GORDEEV A I. Static induction and heterojunction source integrated high-voltage FET, has structure provided with vertical channel, where low-resistance thin layer of gallium arsenide and germanium match lattices of gallium arsenide and silicon. RU2023101620-A[P]. 2023.
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