METHOD OF SYNCHRONIZING OPERATION OF ELEMENTARY PROCESSORS OF MAJORITY REDUNDANT COMPUTER SYSTEMS
2024-05-22
专利权人MILITARY ACAD STRATEGIC MISSILE FORCES (MILI-Non-standard)
申请日期2024-05-22
专利号RU2835006-C1
成果简介NOVELTY - Result is achieved due to method of synchronizing operation of elementary processors of majority-redundant computing systems, which consists in the fact that in the system a fault-tolerant computing system is formed, containing a group of elementary central processors, the output information from the outputs of which is majorized by the method "n and more of (2n-1)", wherein majorization of input signals is performed by generating clocking signals. Incoming input signals are counted from channels of the computer system. When the number of received signals reaches n>((2n-1)/2), an output majority signal is output from the output of the majority organ. USE - Computer engineering. ADVANTAGE - Providing continuous monitoring of operability of computer equipment operating under conditions of continuous dynamics and constant changes in parameters of external conditions. 1 cl, 2 dwg
IPC 分类号G06F-007/57 ; H03K-019/23
国家俄罗斯
专业领域信息技术
语种英语
成果类型专利
文献类型科技成果
条目标识符http://119.78.100.226:8889/handle/3KE4DYBR/16643
专题中国科学院新疆生态与地理研究所
作者单位
MILITARY ACAD STRATEGIC MISSILE FORCES (MILI-Non-standard)
推荐引用方式
GB/T 7714
SYTSEVICH N F,BELOV P YU,TITOV V A,et al. METHOD OF SYNCHRONIZING OPERATION OF ELEMENTARY PROCESSORS OF MAJORITY REDUNDANT COMPUTER SYSTEMS. RU2835006-C1[P]. 2024.
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