Three-dimensional vertically integrated superconducting qubit used in hardware circuitry, has tantalum metal layer deposited over silicon wafer, and gold layer provided on tantalum metal wafer forming contact surface, two wafers of metal bonded together by facing contact surfaces towards each other
	SINGH S G; PANDEY U; BONAM S; MISHRA H
	2024-12-24
专利权人	INDIAN INST TECHNOLOGY HYDERABAD (INTE-Non-standard)
申请日期	2024-12-24
专利号	IN202441102730-A
成果简介	NOVELTY - Three-dimensional vertically integrated superconducting qubit (200) comprises at least two wafers of metal (100), which comprises a silicon wafer (110). A tantalum (Ta) metal layer (120) deposited over the silicon wafer, and a gold (Au) layer (130) of predetermined thickness provided on the tantalum metal wafer forming a contact surface. The two wafers of metal are bonded together by facing contact surfaces towards each other. USE - Three-dimensional vertically integrated superconducting qubit used in the various devices, modules, etc. described herein can be enabled and operated using hardware circuitry, firmware, software or any combination of hardware, firmware, and software (e.g., embodied in a machine-readable medium). ADVANTAGE - The three-dimensional vertically integrated superconducting qubit including 3 nm Au passivation in preventing oxidation and maintaining bond integrity, resulting in reliable Ta-Ta bonding for quantum processors. The integration is done at a low temperature of 300 °C with impressive bond strengths of 169 MPa, and 161 MPa. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for preparing a three-dimensional vertically integrated superconducting qubit. DESCRIPTION OF DRAWING(S) - The drawing illustrates the vertically integrated Tantalum-Tantalum bonded structure of superconducting qubit and the process of thermo compression bonding. 100Wafer of metal 110Silicon wafer 120Tantalum (Ta) metal layer 130Gold (Au) layer 200Three-dimensional vertically integrated superconducting qubit
IPC 分类号	C23C-016/04 ; G06N-010/00 ; H01L-023/00 ; H10N-060/12 ; H10N-069/00
国家	印度
专业领域	材料科学
语种	英语
成果类型	专利
文献类型	科技成果
条目标识符	http://119.78.100.226:8889/handle/3KE4DYBR/13816
专题	中国科学院新疆生态与地理研究所
作者单位	INDIAN INST TECHNOLOGY HYDERABAD (INTE-Non-standard)
推荐引用方式 GB/T 7714	SINGH S G,PANDEY U,BONAM S,et al. Three-dimensional vertically integrated superconducting qubit used in hardware circuitry, has tantalum metal layer deposited over silicon wafer, and gold layer provided on tantalum metal wafer forming contact surface, two wafers of metal bonded together by facing contact surfaces towards each other. IN202441102730-A[P]. 2024.

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